Locations

Campbell, California

About the Position:

The System Validation Engineer position involves writing test plans for validating the SOC, creating, maintaining, and executing robust test automation with Python, performing radio frequency measurement and characterization.

Roles and Responsibilities:

• Work with design engineers, 3rd party vendors, software, and firmware teams to validate and debug issues at SOC or platform (HW).
• Develop evaluation boards, demo boards, and FPGA platform boards.
• Bring up FPGA platform, work with design team to validate all functionality in pre- and post-silicon development stage.

Qualifications Desired:

• 3-5 years of experience in test automation
• Ability to work in a lab environment.
• Proficient at writing test automation code in Python and understand coding best practices.
• Familiar with lab equipment, such as scope, signal generator, BER tester, and thermal chambers.
• General understanding of silicon development process and SOC architecture.
• Debugging and root cause analysis skills.
• Familiarity with USB2, USB-SS, DisplayPort, SATA and Ethernet is a plus.
• Experience with RF measurement is a plus.
• Documenting validation plans, bug tracking and driving to closure.
• Experience of PCB design, layout, and contact with outsourcing vendors for PCB fabrication.
• Strong verbal and written skills in the English language

Educational Requirements:

• BS/MS in ECE, EE, or CS.

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